The present invention relates generally to software and hardware designs and more particularly to the verification of software and hardware designs.
Electronic Design Automation (EDA) is a computer-based tool configured to provide designers with automated tools for designing and verifying user""s custom circuit designs, such as integrated circuit or printed circuit board designs. EDA is used for creating, analyzing, and editing any electronic design for the purpose of simulation, prototyping, execution, or computing. EDA technology can also be used to develop systems that will use the user-designed subsystem or component. The end result of EDA is a modified and enhanced design that is an improvement over the original design.
The use of software simulation and hardware simulation for a design is commonly known as cooperative design, or co-design, and is recognized in various industries that use and benefit from EDA technology. To optimize a co-design, it is desirable to perform software and hardware simulation and verification at the same time. This would allow a designer to consider the tradeoffs between the software and hardware simulations simultaneously. However, current software and hardware co-design simulations and verifications are cumbersome for the user because of the separate and independent nature of two processes. One problem is that most software designs and its simulation results use the floating-point environment (data format) while most hardware designs and its simulation results use the fixed-point environment. Since the simulation results of the software designs and the corresponding hardware designs are in different environments, it is difficult to verify or compare the software and hardware simulation results.
Another problem is that most software and hardware co-design tools in the market are inflexible. Specifically, it is difficult to integrate the tools of one supplier into the products of another. To avoid the problem of integrating tools from various suppliers, users often purchase both software and hardware co-design tools from one supplier. As a result, the users"" choice for upgrading either the software tool or the hardware tool is limited.
Accordingly, there is a need for a method and an apparatus that allow for the co-verification of software and hardware designs and the integration of software and hardware co-design tools manufactured by different suppliers.
The present invention provides a simulation system for simulating behavior of a device for implementing an algorithm using a software model and a hardware model which are converted to a common programming language and mathematical notation. The simulation system uses the same input user interface for the software model and the hardware model. Further, the simulation system uses the same output user interface for generating the simulation results for both the software model and the hardware model in the common programming language and mathematical notation, thereby allowing a user to easily verify and analyze the software and hardware simulation results.
The present invention further provides a simulation system which allows the integration of design tools from multiple suppliers. This would permit a user to mix and match the design tools to provide an optimized simulation system for an optimized device design.
The present invention further provides a simulation system which generates both software simulation results and hardware simulation results in a fixed-point data format to allow for easy verification and analysis of the software and hardware simulation results.
The present invention further provides a simulation system which uses ANSI-C programs and a fixed-point C library in the software model and Verilog Files and PLI-C programs in the hardware model to generate software simulation results and hardware simulation results in a fixed-point data format. The use of a common data format allows the generation of the software simulation results and the hardware simulation results using a common output user interface. This also allows a user to easily verify and analyze the software and hardware simulation results.
The present invention still further provides a simulation system which includes an output user interface that can be configured to generate algorithm simulation results for the software model in a fixed-point data format. This would allow the algorithm simulation to use the same output user interface as the software model. By using a common output user interface a user can easily analyze the software simulation results, the hardware simulation results, and the algorithm simulation results.
The above and additional advantages of the present invention will become apparent to those skilled in the art from a reading of the following detailed description when taken in conjunction with the accompanying drawings.